状态机的基本框架

//状态编码
parameter
	s0=4'b0000,
	s1=4'b0000,
	s2=4'b0000,
	s3=4'b0000,
	s4=4'b0000,
	s5=4'b0000,
	s6=4'b0000,
	s7=4'b0000,
	s8=4'b0000,
	s9=4'b0000,
	s0=4'b0000,
	s0=4'b0000,
	s0=4'b0000,
	s0=4'b0000,

//状态转移
always @(posedge clk or posedge rst)
	if(rst)
		cstate<=s0;
	else
		cstate<=nstate;

//次态判断
always @*
	if(clk2Hz)
		case(cstate)
			s0:nstate=s1;
			s0:nstate=s1;
			s0:nstate=s1;
			s0:nstate=s1;
			s0:nstate=s1;
			s0:nstate=s1;
			s0:nstate=s1;
			s0:nstate=s1;
			s0:nstate=s1;
			s0:nstate=s1;
			s0:nstate=s1;
			s0:nstate=s1;
			s0:nstate=s1;
			s0:nstate=s1;
			s0:nstate=s1;
			default:nstate=s0;
		endcase
	else
		nstate=cstate;

//状态输出

always @(posedge clk or posedge rst)
	if(rst)
		led<=8'b00000000;
	else
		case(cstate)
			s0:led<=8'b00000000;
			s0:led<=8'b00000000;
			s0:led<=8'b00000000;
			s0:led<=8'b00000000;
			s0:led<=8'b00000000;
		endcase

最后

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