最近在做EDA设计，犯了一个错误，不知何原因，大家看后避免之。。。

69 阅读 0 评论 46 点赞

我是靠谱客的博主优秀玫瑰，最近开发中收集的这篇文章主要介绍最近在做EDA设计，犯了一个错误，不知何原因，大家看后避免之。。。，觉得挺不错的，现在分享给大家，希望可以做个参考。

概述

最近在做EDA设计，下面是我写的led七段显示（共阳）驱动，在仿真的时候发现波形不对。

digit比

先贴一下代码。

----------ledDISP.vhd----------------------------------------------

LIBRARY ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_signed.all;
use ieee.std_logic_arith.all;

ENTITY ledDISP IS
PORT(
----------------------------------------------------------------
reset    : IN std_logic:='0';
---- display frequency ----------------
scanning_freq_in : IN std_logic;                                        --扫描的时钟
digit    : OUT bit_vector(5 downto 0):="000000";             --输出digit，表示选择显示位
digit_buf   : buffer bit_vector(5 downto 0):="000000";    --缓存
-------------------------------
--digit[5]hour high PIN_137
--digit[4]hour low PIN_136
--digit[3]min high PIN_161
--digit[2]min low PIN_162
--digit[1]sec high PIN_159
--digit[0]sec low PIN_160
-------------------------------
----------------------------------------------------------------
displaynum   : buffer std_logic_vector(3 downto 0);
seg     : OUT  std_logic_vector(7 downto 0);
----------------------------------------------------------------
---- The number displayed on the LED ----
dighourh: IN std_logic_vector(3 downto 0);
dighourl: IN std_logic_vector(3 downto 0);
digminh : IN std_logic_vector(3 downto 0);
digminl : IN std_logic_vector(3 downto 0);
digsech : IN std_logic_vector(3 downto 0);
digsecl : IN std_logic_vector(3 downto 0)
----------------------------------------------------------------
);
END ledDISP;

ARCHITECTURE behave OF ledDISP IS
BEGIN
PROCESS(scanning_freq_in,reset,digit_buf)
BEGIN
if (reset='1')then
seg   <= "00000000";
digit  <= "000000";
digit_buf <= "111110";
elsif (rising_edge(scanning_freq_in)) then
  digit_buf <= digit_buf ror 1;      -- display next digit;
  digit  <= digit_buf;        -- choose digit;
  CASE digit_buf IS
   when "111110" => displaynum <= digsecl;
   when "111101" => displaynum <= digsech;
   when "111011" => displaynum <= digminl;
   when "110111" => displaynum <= digminh;
   when "101111" => displaynum <= dighourl;
   when "011111" => displaynum <= dighourh;
   when others  => NULL;
  END CASE;
  CASE displaynum IS
   when "1001" => seg <= "00001001";    --9 a+b+c+d+f+g
   when "1000" => seg <= "00000001";    --8 a+b+c+d+e+f+g
   when "0111" => seg <= "00011111";    --7 a+b+c
   when "0110" => seg <= "01000001";    --6 a+c+d+e+f+g
   when "0101" => seg <= "01001001";    --5 a+c+d+f+g
   when "0100" => seg <= "10011001";    --4 b+c+f+g
   when "0011" => seg <= "00001101";    --3 a+b+c+d+g
   when "0010" => seg <= "00100101";    --2 a+b+d+e+g
   when "0001" => seg <= "10011111";    --1 b+c
   when "0000" => seg <= "00000011";    --0 a+b+c+d+e+f
   when others => NULL;
  END CASE;
end if;
END process;
END behave;

------------------------end file------------------------------------------------

seg的波形比digit落后一个时钟。。。很无语。。

问题解决后的文件发上来。

----------------------------ledDISP.vhd--------------------------------------

LIBRARY ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_signed.all;
use ieee.std_logic_arith.all;

ENTITY ledDISP IS
PORT(
----------------------------------------------------------------
reset    : IN std_logic:='0';
---- display frequency ----------------
scanning_freq_in : IN std_logic;
digit    : OUT bit_vector(5 downto 0):="000000";
-------------------------------
--digit[5]hour high PIN_137
--digit[4]hour low PIN_136
--digit[3]min high PIN_161
--digit[2]min low PIN_162
--digit[1]sec high PIN_159
--digit[0]sec low PIN_160
-------------------------------
----------------------------------------------------------------
seg     : OUT  std_logic_vector(7 downto 0);
----------------------------------------------------------------
---- The number displayed on the LED ----
dighourh: IN std_logic_vector(3 downto 0);
dighourl: IN std_logic_vector(3 downto 0);
digminh : IN std_logic_vector(3 downto 0);
digminl : IN std_logic_vector(3 downto 0);
digsech : IN std_logic_vector(3 downto 0);
digsecl : IN std_logic_vector(3 downto 0)
----------------------------------------------------------------
);
END ledDISP;

ARCHITECTURE behave OF ledDISP IS
BEGIN
PROCESS(scanning_freq_in,reset)
variable displaynum : std_logic_vector(3 downto 0):="0000";
variable digit_buf : bit_vector(5 downto 0):="000000";
BEGIN

if (reset='1')then
seg   <= "00000000";
digit  <= "000000";
digit_buf := "111110";
elsif (rising_edge(scanning_freq_in)) then
  digit_buf := digit_buf ror 1;      -- display next digit;
  digit <= digit_buf;

  CASE digit_buf IS
   when "111110" => displaynum := digsecl;
   when "111101" => displaynum := digsech;
   when "111011" => displaynum := digminl;
   when "110111" => displaynum := digminh;
   when "101111" => displaynum := dighourl;
   when "011111" => displaynum := dighourh;
   when others  => NULL;
  END CASE;
  CASE displaynum IS
   when "1001" => seg <= "00001001";    --9 a+b+c+d+f+g
   when "1000" => seg <= "00000001";    --8 a+b+c+d+e+f+g
   when "0111" => seg <= "00011111";    --7 a+b+c
   when "0110" => seg <= "01000001";    --6 a+c+d+e+f+g
   when "0101" => seg <= "01001001";    --5 a+c+d+f+g
   when "0100" => seg <= "10011001";    --4 b+c+f+g
   when "0011" => seg <= "00001101";    --3 a+b+c+d+g
   when "0010" => seg <= "00100101";    --2 a+b+d+e+g
   when "0001" => seg <= "10011111";    --1 b+c
   when "0000" => seg <= "00000011";    --0 a+b+c+d+e+f
   when others => NULL;
  END CASE;
end if;
END process;