Mt2015 muxdff
Taken from ECE253 2015 midterm question 5Consider the sequential circuit below:module top_module ( input clk, input L, input r_in, input q_in, output reg Q); wire w1; Mux2_1 ins1(q_in, r_in,L,w1); flip_flop ins2(w1,clk,Q);endmodulemodul
