Circuits--Sequential Logic--Finite State Machines--Fsm3s
网址：https://hdlbits.01xz.net/wiki/Fsm3smodule top_module( input clk, input in, input reset, output out); // parameter A=0, B=1, C=2, D=3; reg [1:0] state ; reg [1:0] next_state ; always@(posedge clk )
