ARM 学习笔记之4： 常用指令6) MCR and MCR2

Move to Coprocessor from general-purpose register. Depending on the coprocessor, you might be able to
specify various additional operations.
-------------- Note ----------------
MCR2 is not supported in Armv8.

--------------------------------------
Syntax
        MCR{cond} coproc, #opcode1, Rt, CRn, CRm{, #opcode2}
        MCR2{cond} coproc, #opcode1, Rt, CRn, CRm{, #opcode2}
where:
cond
        is an optional condition code.
        In A32 code, cond is not permitted for MCR2.
coproc
        is the name of the coprocessor the instruction is for. The standard name is pn, where n is an integer whose value must be:
        • In the range 0-15 in Armv7 and earlier.
        • 14 or 15 in Armv8.
opcode1
        is a 3-bit coprocessor-specific opcode.
opcode2
        is an optional 3-bit coprocessor-specific opcode.
Rt
        is a general-purpose register. Rt must not be PC.
CRn, CRm
        are coprocessor registers.
Usage
The use of these instructions depends on the coprocessor. See the coprocessor documentation for details.
Architectures
These 32-bit instructions are available in A32 and T32.
There are no 16-bit versions of these instructions in T32.
 

最后

以上就是土豪嚓茶为你收集整理的ARM 学习笔记之4： 常用指令6) MCR and MCR2的全部内容，希望文章能够帮你解决ARM 学习笔记之4： 常用指令6) MCR and MCR2所遇到的程序开发问题。

如果觉得靠谱客网站的内容还不错，欢迎将靠谱客网站推荐给程序员好友。