SystemC is a set of C++ classes
and macros which provide an event-driven simulation interface (see
also discrete event simulation). These facilities enable a designer
to simulate concurrent processes, each described using plain C++
syntax. SystemC processes can communicate in a simulated real-time
environment, using signals of all the datatypes offered by C++,
some additional ones offered by the SystemC library, as well as
user defined. In certain respects, SystemC deliberately mimics the
hardware description languages VHDL and Verilog, but is more aptly
described as a system-level modeling language.
SystemC is applied to system-level modeling, architectural
exploration, performance modeling, software development, functional
verification, and high-level synthesis. SystemC is often associated
with electronic system-level (ESL) design, and with
transaction-level modeling (TLM).
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